/* Based on CPU DB MC9S12I32_44, version 2.87.056 (RegistersPrg V2.32) */
/* DataSheet : MC9S12I32 Rev 2.1 5/2007 */

#include <mc9s12i32.h>

/*lint -save -esym(765, *) */


/* * * * *  8-BIT REGISTERS  * * * * * * * * * * * * * * * */
volatile PTASTR _PTA;                                      /* Port A Data Register; 0x00000000 */
volatile DDRASTR _DDRA;                                    /* Data Direction Register A; 0x00000002 */
volatile PTCSTR _PTC;                                      /* Port C Data Register; 0x00000004 */
volatile PTDSTR _PTD;                                      /* Port D Data Register; 0x00000005 */
volatile DDRCSTR _DDRC;                                    /* Data Direction Register C; 0x00000006 */
volatile DDRDSTR _DDRD;                                    /* Data Direction Register D; 0x00000007 */
volatile IVBRSTR _IVBR;                                    /* Interrupt Vector Base Register; 0x0000001F */
volatile DBGC1STR _DBGC1;                                  /* Debug Control Register 1; 0x00000020 */
volatile DBGSRSTR _DBGSR;                                  /* Debug Status Register; 0x00000021 */
volatile DBGTCRSTR _DBGTCR;                                /* Debug Trace Control Register; 0x00000022 */
volatile DBGC2STR _DBGC2;                                  /* Debug Control Register 2; 0x00000023 */
volatile DBGCNTSTR _DBGCNT;                                /* Debug Count Register; 0x00000026 */
volatile DBGSCRXSTR _DBGSCRX;                              /* Debug State Control Register 0; 0x00000027 */
volatile DBGXCTLSTR _DBGXCTL;                              /* Debug Comparator Control Register; 0x00000028 */
volatile DBGXAHSTR _DBGXAH;                                /* Debug Comparator Address High Register; 0x00000029 */
volatile DBGXAMSTR _DBGXAM;                                /* Debug Comparator Address Mid Register; 0x0000002A */
volatile DBGXALSTR _DBGXAL;                                /* Debug Comparator Address Low Register; 0x0000002B */
volatile DBGADHSTR _DBGADH;                                /* Debug Comparator Data High Register; 0x0000002C */
volatile DBGADLSTR _DBGADL;                                /* Debug Comparator Data Low Register; 0x0000002D */
volatile DBGADHMSTR _DBGADHM;                              /* Debug Comparator Data High Mask Register; 0x0000002E */
volatile DBGADLMSTR _DBGADLM;                              /* Debug Comparator Data Low Mask Register; 0x0000002F */
volatile PPAGESTR _PPAGE;                                  /* Page Index Register; 0x00000030 */
volatile DIRECTSTR _DIRECT;                                /* Direct Page Register; 0x00000031 */
volatile MODESTR _MODE;                                    /* Mode Register; 0x00000032 */
volatile MMCCTL1STR _MMCCTL1;                              /* MMCCTL1 Register; 0x00000033 */
volatile CRGCTL0STR _CRGCTL0;                              /* S12SCRG Control Register 0; 0x00000034 */
volatile CRGCTL1STR _CRGCTL1;                              /* S12SCRG Control Register 1; 0x00000035 */
volatile CRGMULTSTR _CRGMULT;                              /* S12SCRG FLL Multiply Register; 0x00000036 */
volatile CRGFLGSTR _CRGFLG;                                /* S12SCRG Flags Register; 0x00000037 */
volatile RTICTLSTR _RTICTL;                                /* CRG RTI Control Register; 0x0000003C */
volatile RTICNTSTR _RTICNT;                                /* RTI Counter select bits; 0x0000003D */
volatile COPCTLSTR _COPCTL;                                /* CRG COP Control Register; 0x0000003E */
volatile ARMCOPSTR _ARMCOP;                                /* CRG COP Timer Arm/Reset Register; 0x0000003F */
volatile D2DCTL0STR _D2DCTL0;                              /* D2DI Control Register 0; 0x000000D8 */
volatile D2DCTL1STR _D2DCTL1;                              /* D2DI Control Register 1; 0x000000D9 */
volatile D2DSTAT0STR _D2DSTAT0;                            /* D2DI Status Register 0; 0x000000DA */
volatile D2DSTAT1STR _D2DSTAT1;                            /* D2DI Status Register 1; 0x000000DB */
volatile SPI0CR1STR _SPI0CR1;                              /* SPI Control Register; 0x000000E8 */
volatile SPI0CR2STR _SPI0CR2;                              /* SPI Control Register 2; 0x000000E9 */
volatile SPI0BRSTR _SPI0BR;                                /* SPI Baud Rate Register; 0x000000EA */
volatile SPI0SRSTR _SPI0SR;                                /* SPI Status Register; 0x000000EB */
volatile SPI0DRSTR _SPI0DR;                                /* SPI Data Register; 0x000000ED */
volatile PTIASTR _PTIA;                                    /* Port A Input Register; 0x00000120 */
volatile RDRASTR _RDRA;                                    /* Port A Reduced Drive Register; 0x00000122 */


/* * * * *  16-BIT REGISTERS  * * * * * * * * * * * * * * * */
volatile PARTIDSTR _PARTID;                                /* Part ID Register; 0x0000001A */
volatile DBGTBSTR _DBGTB;                                  /* Debug Trace Buffer Register; 0x00000024 */
volatile CRGTRIMSTR _CRGTRIM;                              /* S12SCRG TRIM Register High; 0x00000038 */
volatile D2DADRSTR _D2DADR;                                /* D2DI Address Buffer Register; 0x000000DC */
volatile D2DDATASTR _D2DDATA;                              /* D2DI Data Buffer Register; 0x000000DE */

/*lint -restore */

/* EOF */
