/* Based on CPU DB MC9S12NE64_112, version 2.87.130 (RegistersPrg V2.28) */
/* DataSheet : MC9S12NE64V1 Rev. 1.1 06/2006 */

#include <mc9s12ne64.h>

/*lint -save -esym(765, *) */


/* * * * *  8-BIT REGISTERS  * * * * * * * * * * * * * * * */
volatile PORTESTR _PORTE;                                  /* Port E Register; 0x00000008 */
volatile DDRESTR _DDRE;                                    /* Port E Data Direction Register; 0x00000009 */
volatile PEARSTR _PEAR;                                    /* Port E Assignment Register; 0x0000000A */
volatile MODESTR _MODE;                                    /* Mode Register; 0x0000000B */
volatile PUCRSTR _PUCR;                                    /* Pull-Up Control Register; 0x0000000C */
volatile RDRIVSTR _RDRIV;                                  /* Reduced Drive of I/O Lines; 0x0000000D */
volatile EBICTLSTR _EBICTL;                                /* External Bus Interface Control; 0x0000000E */
volatile INITRMSTR _INITRM;                                /* Initialization of Internal RAM Position Register; 0x00000010 */
volatile INITRGSTR _INITRG;                                /* Initialization of Internal Registers Position Register; 0x00000011 */
volatile MISCSTR _MISC;                                    /* Miscellaneous System Control Register; 0x00000013 */
volatile ITCRSTR _ITCR;                                    /* Interrupt Test Control Register; 0x00000015 */
volatile ITESTSTR _ITEST;                                  /* Interrupt Test Register; 0x00000016 */
volatile MEMSIZ0STR _MEMSIZ0;                              /* Memory Size Register Zero; 0x0000001C */
volatile MEMSIZ1STR _MEMSIZ1;                              /* Memory Size Register One; 0x0000001D */
volatile INTCRSTR _INTCR;                                  /* Interrupt Control Register; 0x0000001E */
volatile HPRIOSTR _HPRIO;                                  /* Highest Priority I Interrupt; 0x0000001F */
volatile DBGC1STR _DBGC1;                                  /* Debug Control Register 1; 0x00000020 */
volatile DBGSCSTR _DBGSC;                                  /* Debug Status and Control Register; 0x00000021 */
volatile DBGCNTSTR _DBGCNT;                                /* Debug Count Register; 0x00000024 */
volatile DBGCCXSTR _DBGCCX;                                /* Debug Comparator C Extended Register; 0x00000025 */
volatile DBGC2STR _DBGC2;                                  /* Debug Control Register 2; 0x00000028 */
volatile DBGC3STR _DBGC3;                                  /* Debug Control Register 3; 0x00000029 */
volatile DBGCAXSTR _DBGCAX;                                /* Debug Comparator A Extended Register; 0x0000002A */
volatile DBGCBXSTR _DBGCBX;                                /* Debug Comparator B Extended Register; 0x0000002D */
volatile PPAGESTR _PPAGE;                                  /* Page Index Register; 0x00000030 */
volatile PORTKSTR _PORTK;                                  /* Port K Data Register; 0x00000032 */
volatile DDRKSTR _DDRK;                                    /* Port K Data Direction Register; 0x00000033 */
volatile SYNRSTR _SYNR;                                    /* CRG Synthesizer Register; 0x00000034 */
volatile REFDVSTR _REFDV;                                  /* CRG Reference Divider Register; 0x00000035 */
volatile CRGFLGSTR _CRGFLG;                                /* CRG Flags Register; 0x00000037 */
volatile CRGINTSTR _CRGINT;                                /* CRG Interrupt Enable Register; 0x00000038 */
volatile CLKSELSTR _CLKSEL;                                /* CRG Clock Select Register; 0x00000039 */
volatile PLLCTLSTR _PLLCTL;                                /* CRG PLL Control Register; 0x0000003A */
volatile RTICTLSTR _RTICTL;                                /* CRG RTI Control Register; 0x0000003B */
volatile COPCTLSTR _COPCTL;                                /* CRG COP Control Register; 0x0000003C */
volatile ARMCOPSTR _ARMCOP;                                /* CRG COP Timer Arm/Reset Register; 0x0000003F */
volatile TIOSSTR _TIOS;                                    /* Timer Input Capture/Output Compare Select; 0x00000040 */
volatile CFORCSTR _CFORC;                                  /* Timer Compare Force Register; 0x00000041 */
volatile OC7MSTR _OC7M;                                    /* Output Compare 7 Mask Register; 0x00000042 */
volatile OC7DSTR _OC7D;                                    /* Output Compare 7 Data Register; 0x00000043 */
volatile TSCR1STR _TSCR1;                                  /* Timer System Control Register1; 0x00000046 */
volatile TTOVSTR _TTOV;                                    /* Timer Toggle On Overflow Register; 0x00000047 */
volatile TCTL1STR _TCTL1;                                  /* Timer Control Register 1; 0x00000048 */
volatile TCTL3STR _TCTL3;                                  /* Timer Control Register 3; 0x0000004A */
volatile TIESTR _TIE;                                      /* Timer Interrupt Enable Register; 0x0000004C */
volatile TSCR2STR _TSCR2;                                  /* Timer System Control Register 2; 0x0000004D */
volatile TFLG1STR _TFLG1;                                  /* Main Timer Interrupt Flag 1; 0x0000004E */
volatile TFLG2STR _TFLG2;                                  /* Main Timer Interrupt Flag 2; 0x0000004F */
volatile PACTLSTR _PACTL;                                  /* 16-Bit Pulse Accumulator A Control Register; 0x00000060 */
volatile PAFLGSTR _PAFLG;                                  /* Pulse Accumulator A Flag Register; 0x00000061 */
volatile ATDSTAT0STR _ATDSTAT0;                            /* ATD Status Register 0; 0x00000086 */
volatile ATDTEST1STR _ATDTEST1;                            /* ATD Test Register; 0x00000089 */
volatile ATDSTAT1STR _ATDSTAT1;                            /* ATD Status Register 1; 0x0000008B */
volatile ATDDIENSTR _ATDDIEN;                              /* ATD Input Enable Register; 0x0000008D */
volatile PORTADSTR _PORTAD;                                /* Port AD Data Register; 0x0000008F */
volatile SCI0CR1STR _SCI0CR1;                              /* SCI 0 Control Register 1; 0x000000CA */
volatile SCI0CR2STR _SCI0CR2;                              /* SCI 0 Control Register 2; 0x000000CB */
volatile SCI0SR1STR _SCI0SR1;                              /* SCI 0 Status Register 1; 0x000000CC */
volatile SCI0SR2STR _SCI0SR2;                              /* SCI 0 Status Register 2; 0x000000CD */
volatile SCI0DRHSTR _SCI0DRH;                              /* SCI 0 Data Register High; 0x000000CE */
volatile SCI0DRLSTR _SCI0DRL;                              /* SCI 0 Data Register Low; 0x000000CF */
volatile SCI1CR1STR _SCI1CR1;                              /* SCI 1 Control Register 1; 0x000000D2 */
volatile SCI1CR2STR _SCI1CR2;                              /* SCI 1 Control Register 2; 0x000000D3 */
volatile SCI1SR1STR _SCI1SR1;                              /* SCI 1 Status Register 1; 0x000000D4 */
volatile SCI1SR2STR _SCI1SR2;                              /* SCI 1 Status Register 2; 0x000000D5 */
volatile SCI1DRHSTR _SCI1DRH;                              /* SCI 1 Data Register High; 0x000000D6 */
volatile SCI1DRLSTR _SCI1DRL;                              /* SCI 1 Data Register Low; 0x000000D7 */
volatile SPICR1STR _SPICR1;                                /* SPI Control Register; 0x000000D8 */
volatile SPICR2STR _SPICR2;                                /* SPI Control Register 2; 0x000000D9 */
volatile SPIBRSTR _SPIBR;                                  /* SPI Baud Rate Register; 0x000000DA */
volatile SPISRSTR _SPISR;                                  /* SPI Status Register; 0x000000DB */
volatile SPIDRSTR _SPIDR;                                  /* SPI Data Register; 0x000000DD */
volatile IBADSTR _IBAD;                                    /* IIC Address Register; 0x000000E0 */
volatile IBFDSTR _IBFD;                                    /* IIC Frequency Divider Register; 0x000000E1 */
volatile IBCRSTR _IBCR;                                    /* IIC Control Register; 0x000000E2 */
volatile IBSRSTR _IBSR;                                    /* IIC Status Register; 0x000000E3 */
volatile IBDRSTR _IBDR;                                    /* IIC Data I/O Register; 0x000000E4 */
volatile FCLKDIVSTR _FCLKDIV;                              /* Flash Clock Divider Register; 0x00000100 */
volatile FSECSTR _FSEC;                                    /* Flash Security Register; 0x00000101 */
volatile FCNFGSTR _FCNFG;                                  /* Flash Configuration Register; 0x00000103 */
volatile FPROTSTR _FPROT;                                  /* Flash Protection Register; 0x00000104 */
volatile FSTATSTR _FSTAT;                                  /* Flash Status Register; 0x00000105 */
volatile FCMDSTR _FCMD;                                    /* Flash Command Buffer and Register; 0x00000106 */
volatile EPHYCTL0STR _EPHYCTL0;                            /* Ethernet Physical Transceiver Control Register 0; 0x00000120 */
volatile EPHYCTL1STR _EPHYCTL1;                            /* Ethernet Physical Transceiver Control Register 1; 0x00000121 */
volatile EPHYSRSTR _EPHYSR;                                /* Ethernet Physical Transceiver Status Register; 0x00000122 */
volatile NETCTLSTR _NETCTL;                                /* Network Control; 0x00000140 */
volatile RXCTSSTR _RXCTS;                                  /* Receive Control and Status; 0x00000143 */
volatile TXCTSSTR _TXCTS;                                  /* Transmit Control and Status; 0x00000144 */
volatile ETCTLSTR _ETCTL;                                  /* Ethertype Control; 0x00000145 */
volatile SWRSTSTR _SWRST;                                  /* Software Reset; 0x0000014E */
volatile MPADRSTR _MPADR;                                  /* MII PHY Address; 0x00000150 */
volatile MRADRSTR _MRADR;                                  /* MII Register Address; 0x00000151 */
volatile MCMSTSTR _MCMST;                                  /* MII Command and Status; 0x00000156 */
volatile PTTSTR _PTT;                                      /* Port T I/O Register; 0x00000240 */
volatile PTITSTR _PTIT;                                    /* Port T Input Register; 0x00000241 */
volatile DDRTSTR _DDRT;                                    /* Port T Data Direction Register; 0x00000242 */
volatile RDRTSTR _RDRT;                                    /* Port T Reduced Drive Register; 0x00000243 */
volatile PERTSTR _PERT;                                    /* Port T Pull Device Enable Register; 0x00000244 */
volatile PPSTSTR _PPST;                                    /* Port T Polarity Select Register; 0x00000245 */
volatile PTSSTR _PTS;                                      /* Port S I/O Register; 0x00000248 */
volatile PTISSTR _PTIS;                                    /* Port S Input Register; 0x00000249 */
volatile DDRSSTR _DDRS;                                    /* Port S Data Direction Register; 0x0000024A */
volatile RDRSSTR _RDRS;                                    /* Port S Reduced Drive Register; 0x0000024B */
volatile PERSSTR _PERS;                                    /* Port S Pull Device Enable Register; 0x0000024C */
volatile PPSSSTR _PPSS;                                    /* Port S Polarity Select Register; 0x0000024D */
volatile WOMSSTR _WOMS;                                    /* Port S Wired-Or Mode Register; 0x0000024E */
volatile PTGSTR _PTG;                                      /* Port G I/O Register; 0x00000250 */
volatile PTIGSTR _PTIG;                                    /* Port G Input Register; 0x00000251 */
volatile DDRGSTR _DDRG;                                    /* Port G Data Direction Register; 0x00000252 */
volatile RDRGSTR _RDRG;                                    /* Port G Reduced Drive Register; 0x00000253 */
volatile PERGSTR _PERG;                                    /* Port G Pull Device Enable Register; 0x00000254 */
volatile PPSGSTR _PPSG;                                    /* Port G Polarity Select Register; 0x00000255 */
volatile PIEGSTR _PIEG;                                    /* Port G Interrupt Enable Register; 0x00000256 */
volatile PIFGSTR _PIFG;                                    /* Port G Interrupt Flag Register; 0x00000257 */
volatile PTHSTR _PTH;                                      /* Port H I/O Register; 0x00000258 */
volatile PTIHSTR _PTIH;                                    /* Port H Input Register; 0x00000259 */
volatile DDRHSTR _DDRH;                                    /* Port H Data Direction Register; 0x0000025A */
volatile RDRHSTR _RDRH;                                    /* Port H Reduced Drive Register; 0x0000025B */
volatile PERHSTR _PERH;                                    /* Port H Pull Device Enable Register; 0x0000025C */
volatile PPSHSTR _PPSH;                                    /* Port H Polarity Select Register; 0x0000025D */
volatile PIEHSTR _PIEH;                                    /* Port H Interrupt Enable Register; 0x0000025E */
volatile PIFHSTR _PIFH;                                    /* Port H Interrupt Flag Register; 0x0000025F */
volatile PTJSTR _PTJ;                                      /* Port J I/O Register; 0x00000260 */
volatile PTIJSTR _PTIJ;                                    /* Port J Input Register; 0x00000261 */
volatile DDRJSTR _DDRJ;                                    /* Port J Data Direction Register; 0x00000262 */
volatile RDRJSTR _RDRJ;                                    /* Port J Reduced Drive Register; 0x00000263 */
volatile PERJSTR _PERJ;                                    /* Port J Pull Device Enable Register; 0x00000264 */
volatile PPSJSTR _PPSJ;                                    /* Port J Polarity Select Register; 0x00000265 */
volatile PIEJSTR _PIEJ;                                    /* Port J Interrupt Enable Register; 0x00000266 */
volatile PIFJSTR _PIFJ;                                    /* Port J Interrupt Flag Register; 0x00000267 */
volatile PTLSTR _PTL;                                      /* Port L I/O Register; 0x00000268 */
volatile PTILSTR _PTIL;                                    /* Port L Input Register; 0x00000269 */
volatile DDRLSTR _DDRL;                                    /* Port L Data Direction Register; 0x0000026A */
volatile RDRLSTR _RDRL;                                    /* Port L Reduced Drive Register; 0x0000026B */
volatile PERLSTR _PERL;                                    /* Port L Pull Device Enable Register; 0x0000026C */
volatile PPSLSTR _PPSL;                                    /* Port L Polarity Select Register; 0x0000026D */
volatile WOMLSTR _WOML;                                    /* Port L Wired-Or Mode Register; 0x0000026E */
/* NVFPROT0 - macro for reading non volatile register      Non volatile Block 0 Flash Protection Register; 0x0000FF0D */
/* NVFSEC - macro for reading non volatile register        Non volatile Flash Security Register; 0x0000FF0F */


/* * * * *  16-BIT REGISTERS  * * * * * * * * * * * * * * * */
volatile PORTABSTR _PORTAB;                                /* Port AB Register; 0x00000000 */
volatile DDRABSTR _DDRAB;                                  /* Port AB Data Direction Register; 0x00000002 */
volatile PARTIDSTR _PARTID;                                /* Part ID Register; 0x0000001A */
volatile DBGTBSTR _DBGTB;                                  /* Debug Trace Buffer Register; 0x00000022 */
volatile DBGCCSTR _DBGCC;                                  /* Debug Comparator C Register; 0x00000026 */
volatile DBGCASTR _DBGCA;                                  /* Debug Comparator A Register; 0x0000002B */
volatile DBGCBSTR _DBGCB;                                  /* Debug Comparator B Register; 0x0000002E */
volatile TCNTSTR _TCNT;                                    /* Timer Count Register; 0x00000044 */
volatile TC4STR _TC4;                                      /* Timer Input Capture/Output Compare Register 4; 0x00000058 */
volatile TC5STR _TC5;                                      /* Timer Input Capture/Output Compare Register 5; 0x0000005A */
volatile TC6STR _TC6;                                      /* Timer Input Capture/Output Compare Register 6; 0x0000005C */
volatile TC7STR _TC7;                                      /* Timer Input Capture/Output Compare Register 7; 0x0000005E */
volatile PACNTSTR _PACNT;                                  /* Pulse Accumulators Count Register; 0x00000062 */
volatile ATDCTL01STR _ATDCTL01;                            /* ATD Control Register 01; 0x00000080 */
volatile ATDCTL23STR _ATDCTL23;                            /* ATD Control Register 23; 0x00000082 */
volatile ATDCTL45STR _ATDCTL45;                            /* ATD Control Register 45; 0x00000084 */
volatile ATDDR0STR _ATDDR0;                                /* ATD Conversion Result Register 0; 0x00000090 */
volatile ATDDR1STR _ATDDR1;                                /* ATD Conversion Result Register 1; 0x00000092 */
volatile ATDDR2STR _ATDDR2;                                /* ATD Conversion Result Register 2; 0x00000094 */
volatile ATDDR3STR _ATDDR3;                                /* ATD Conversion Result Register 3; 0x00000096 */
volatile ATDDR4STR _ATDDR4;                                /* ATD Conversion Result Register 4; 0x00000098 */
volatile ATDDR5STR _ATDDR5;                                /* ATD Conversion Result Register 5; 0x0000009A */
volatile ATDDR6STR _ATDDR6;                                /* ATD Conversion Result Register 6; 0x0000009C */
volatile ATDDR7STR _ATDDR7;                                /* ATD Conversion Result Register 7; 0x0000009E */
volatile SCI0BDSTR _SCI0BD;                                /* SCI 0 Baud Rate Register; 0x000000C8 */
volatile SCI1BDSTR _SCI1BD;                                /* SCI 1 Baud Rate Register; 0x000000D0 */
volatile ETYPESTR _ETYPE;                                  /* Programmable Ethertype; 0x00000146 */
volatile PTIMESTR _PTIME;                                  /* PAUSE Timer Value and Counter; 0x00000148 */
volatile IEVENTSTR _IEVENT;                                /* Interrupt Event; 0x0000014A */
volatile IMASKSTR _IMASK;                                  /* Interrupt Mask; 0x0000014C */
volatile MWDATASTR _MWDATA;                                /* MII Write Data; 0x00000152 */
volatile MRDATASTR _MRDATA;                                /* MII Read Data; 0x00000154 */
volatile BUFCFGSTR _BUFCFG;                                /* FIFO Buffer Configuration; 0x00000158 */
volatile RXAEFPSTR _RXAEFP;                                /* Receive A End of Frame Pointer; 0x0000015A */
volatile RXBEFPSTR _RXBEFP;                                /* Receive B End of Frame Pointer; 0x0000015C */
volatile TXEFPSTR _TXEFP;                                  /* Transmit End of Frame Pointer; 0x0000015E */
volatile MCHASH3STR _MCHASH3;                              /* Multicast Hash Table Register 3; 0x00000160 */
volatile MCHASH2STR _MCHASH2;                              /* Multicast Hash Table Register 2; 0x00000162 */
volatile MCHASH1STR _MCHASH1;                              /* Multicast Hash Table Register 1; 0x00000164 */
volatile MCHASH0STR _MCHASH0;                              /* Multicast Hash Table Register 0; 0x00000166 */
volatile MACAD2STR _MACAD2;                                /* MAC Address Register 2; 0x00000168 */
volatile MACAD1STR _MACAD1;                                /* MAC Address Register 1; 0x0000016A */
volatile MACAD0STR _MACAD0;                                /* MAC Address Register 0; 0x0000016C */
volatile EMISCSTR _EMISC;                                  /* MAC Address Register 3; 0x0000016E */
/* BAKEY0 - macro for reading non volatile register        Backdoor Access Key 0; 0x0000FF00 */
/* BAKEY1 - macro for reading non volatile register        Backdoor Access Key 1; 0x0000FF02 */
/* BAKEY2 - macro for reading non volatile register        Backdoor Access Key 2; 0x0000FF04 */
/* BAKEY3 - macro for reading non volatile register        Backdoor Access Key 3; 0x0000FF06 */

/*lint -restore */

/* EOF */
