/* Based on CPU DB MC9S12XA512_144, version 3.00.018 (RegistersPrg V2.28) */
/* DataSheet : MC9S12XDP512RMV2 Rev. 2.18 May 2008 */

#include <mc9s12xa512.h>

/*lint -save -esym(765, *) */


/* * * * *  8-BIT REGISTERS  * * * * * * * * * * * * * * * */
volatile PORTESTR _PORTE;                                  /* Port E Data Register; 0x00000008 */
volatile DDRESTR _DDRE;                                    /* Port E Data Direction Register; 0x00000009 */
volatile MMCCTL0STR _MMCCTL0;                              /* MMC Control Register; 0x0000000A */
volatile MODESTR _MODE;                                    /* Mode Register; 0x0000000B */
volatile PUCRSTR _PUCR;                                    /* Pull-Up Control Register; 0x0000000C */
volatile RDRIVSTR _RDRIV;                                  /* Reduced Drive Register; 0x0000000D */
volatile EBICTL0STR _EBICTL0;                              /* External Bus Interface Control Register 0; 0x0000000E */
volatile EBICTL1STR _EBICTL1;                              /* External Bus Interface Control Register 1; 0x0000000F */
volatile GPAGESTR _GPAGE;                                  /* Global Page Index Register; 0x00000010 */
volatile DIRECTSTR _DIRECT;                                /* Direct Page Register; 0x00000011 */
volatile MMCCTL1STR _MMCCTL1;                              /* MMC Control Register; 0x00000013 */
volatile RPAGESTR _RPAGE;                                  /* RAM Page Index Register; 0x00000016 */
volatile EPAGESTR _EPAGE;                                  /* Data FLASH Page Index Register; 0x00000017 */
volatile ECLKCTLSTR _ECLKCTL;                              /* ECLK Control Register; 0x0000001C */
volatile IRQCRSTR _IRQCR;                                  /* Interrupt Control Register; 0x0000001E */
volatile DBGC1STR _DBGC1;                                  /* Debug Control Register 1; 0x00000020 */
volatile DBGSRSTR _DBGSR;                                  /* Debug Status Register; 0x00000021 */
volatile DBGTCRSTR _DBGTCR;                                /* Debug Trace Control Register; 0x00000022 */
volatile DBGC2STR _DBGC2;                                  /* Debug Control Register 2; 0x00000023 */
volatile DBGCNTSTR _DBGCNT;                                /* Debug Count Register; 0x00000026 */
volatile DBGSCRXSTR _DBGSCRX;                              /* Debug State Control Register; 0x00000027 */
volatile DBGXCTLSTR _DBGXCTL;                              /* Debug Comparator Control Register; 0x00000028 */
volatile DBGXAHSTR _DBGXAH;                                /* Debug Comparator Address High Register; 0x00000029 */
volatile DBGXAMSTR _DBGXAM;                                /* Debug Comparator Address Mid Register; 0x0000002A */
volatile DBGXALSTR _DBGXAL;                                /* Debug Comparator Address Low Register; 0x0000002B */
volatile DBGXDHSTR _DBGXDH;                                /* Debug Comparator Data High Register; 0x0000002C */
volatile DBGXDLSTR _DBGXDL;                                /* Debug Comparator Data Low Register; 0x0000002D */
volatile DBGXDHMSTR _DBGXDHM;                              /* Debug Comparator Data High Mask Register; 0x0000002E */
volatile DBGXDLMSTR _DBGXDLM;                              /* Debug Comparator Data Low Mask Register; 0x0000002F */
volatile PPAGESTR _PPAGE;                                  /* Program Page Index Register; 0x00000030 */
volatile PORTKSTR _PORTK;                                  /* Port K Data Register; 0x00000032 */
volatile DDRKSTR _DDRK;                                    /* Port K Data Direction Register; 0x00000033 */
volatile SYNRSTR _SYNR;                                    /* CRG Synthesizer Register; 0x00000034 */
volatile REFDVSTR _REFDV;                                  /* CRG Reference Divider Register; 0x00000035 */
volatile CRGFLGSTR _CRGFLG;                                /* CRG Flags Register; 0x00000037 */
volatile CRGINTSTR _CRGINT;                                /* CRG Interrupt Enable Register; 0x00000038 */
volatile CLKSELSTR _CLKSEL;                                /* CRG Clock Select Register; 0x00000039 */
volatile PLLCTLSTR _PLLCTL;                                /* CRG PLL Control Register; 0x0000003A */
volatile RTICTLSTR _RTICTL;                                /* CRG RTI Control Register; 0x0000003B */
volatile COPCTLSTR _COPCTL;                                /* CRG COP Control Register; 0x0000003C */
volatile ARMCOPSTR _ARMCOP;                                /* CRG COP Timer Arm/Reset Register; 0x0000003F */
volatile TIOSSTR _TIOS;                                    /* Timer Input Capture/Output Compare Select; 0x00000040 */
volatile CFORCSTR _CFORC;                                  /* Timer Compare Force Register; 0x00000041 */
volatile OC7MSTR _OC7M;                                    /* Output Compare 7 Mask Register; 0x00000042 */
volatile OC7DSTR _OC7D;                                    /* Output Compare 7 Data Register; 0x00000043 */
volatile TSCR1STR _TSCR1;                                  /* Timer System Control Register1; 0x00000046 */
volatile TTOVSTR _TTOV;                                    /* Timer Toggle On Overflow Register; 0x00000047 */
volatile TCTL1STR _TCTL1;                                  /* Timer Control Register 1; 0x00000048 */
volatile TCTL2STR _TCTL2;                                  /* Timer Control Register 2; 0x00000049 */
volatile TCTL3STR _TCTL3;                                  /* Timer Control Register 3; 0x0000004A */
volatile TCTL4STR _TCTL4;                                  /* Timer Control Register 4; 0x0000004B */
volatile TIESTR _TIE;                                      /* Timer Interrupt Enable Register; 0x0000004C */
volatile TSCR2STR _TSCR2;                                  /* Timer System Control Register 2; 0x0000004D */
volatile TFLG1STR _TFLG1;                                  /* Main Timer Interrupt Flag 1; 0x0000004E */
volatile TFLG2STR _TFLG2;                                  /* Main Timer Interrupt Flag 2; 0x0000004F */
volatile PACTLSTR _PACTL;                                  /* 16-Bit Pulse Accumulator A Control Register; 0x00000060 */
volatile PAFLGSTR _PAFLG;                                  /* Pulse Accumulator A Flag Register; 0x00000061 */
volatile MCCTLSTR _MCCTL;                                  /* Modulus Down Counter underflow; 0x00000066 */
volatile MCFLGSTR _MCFLG;                                  /* 16-Bit Modulus Down Counter Flag Register; 0x00000067 */
volatile ICPARSTR _ICPAR;                                  /* Input Control Pulse Accumulator Register; 0x00000068 */
volatile DLYCTSTR _DLYCT;                                  /* Delay Counter Control Register; 0x00000069 */
volatile ICOVWSTR _ICOVW;                                  /* Input Control Overwrite Register; 0x0000006A */
volatile ICSYSSTR _ICSYS;                                  /* Input Control System Control Register; 0x0000006B */
volatile PTPSRSTR _PTPSR;                                  /* Precision Timer Prescaler Select Register; 0x0000006E */
volatile PTMCPSRSTR _PTMCPSR;                              /* Precision Timer Modulus Counter Prescaler Select Register; 0x0000006F */
volatile PBCTLSTR _PBCTL;                                  /* 16-Bit Pulse Accumulator B Control Register; 0x00000070 */
volatile PBFLGSTR _PBFLG;                                  /* Pulse Accumulator B Flag Register; 0x00000071 */
volatile ATD1STAT0STR _ATD1STAT0;                          /* ATD 1 Status Register 0; 0x00000086 */
volatile ATD1TEST1STR _ATD1TEST1;                          /* ATD1 Test Register; 0x00000089 */
volatile ATD1STAT2STR _ATD1STAT2;                          /* ATD 1 Status Register 2; 0x0000008A */
volatile ATD1STAT1STR _ATD1STAT1;                          /* ATD 1 Status Register 1; 0x0000008B */
volatile SCI2ACR2STR _SCI2ACR2;                            /* SCI 2 Alternative Control Register 2; 0x000000BA */
volatile SCI2CR2STR _SCI2CR2;                              /* SCI 2 Control Register 2; 0x000000BB */
volatile SCI2SR1STR _SCI2SR1;                              /* SCI 2 Status Register 1; 0x000000BC */
volatile SCI2SR2STR _SCI2SR2;                              /* SCI 2 Status Register 2; 0x000000BD */
volatile SCI2DRHSTR _SCI2DRH;                              /* SCI 2 Data Register High; 0x000000BE */
volatile SCI2DRLSTR _SCI2DRL;                              /* SCI 2 Data Register Low; 0x000000BF */
volatile SCI3ACR2STR _SCI3ACR2;                            /* SCI 3 Alternative Control Register 2; 0x000000C2 */
volatile SCI3CR2STR _SCI3CR2;                              /* SCI 3 Control Register 2; 0x000000C3 */
volatile SCI3SR1STR _SCI3SR1;                              /* SCI 3 Status Register 1; 0x000000C4 */
volatile SCI3SR2STR _SCI3SR2;                              /* SCI 3 Status Register 2; 0x000000C5 */
volatile SCI3DRHSTR _SCI3DRH;                              /* SCI 3 Data Register High; 0x000000C6 */
volatile SCI3DRLSTR _SCI3DRL;                              /* SCI 3 Data Register Low; 0x000000C7 */
volatile SCI0ACR2STR _SCI0ACR2;                            /* SCI 0 Alternative Control Register 2; 0x000000CA */
volatile SCI0CR2STR _SCI0CR2;                              /* SCI 0 Control Register 2; 0x000000CB */
volatile SCI0SR1STR _SCI0SR1;                              /* SCI 0 Status Register 1; 0x000000CC */
volatile SCI0SR2STR _SCI0SR2;                              /* SCI 0 Status Register 2; 0x000000CD */
volatile SCI0DRHSTR _SCI0DRH;                              /* SCI 0 Data Register High; 0x000000CE */
volatile SCI0DRLSTR _SCI0DRL;                              /* SCI 0 Data Register Low; 0x000000CF */
volatile SCI1ACR2STR _SCI1ACR2;                            /* SCI 1 Alternative Control Register 2; 0x000000D2 */
volatile SCI1CR2STR _SCI1CR2;                              /* SCI 1 Control Register 2; 0x000000D3 */
volatile SCI1SR1STR _SCI1SR1;                              /* SCI 1 Status Register 1; 0x000000D4 */
volatile SCI1SR2STR _SCI1SR2;                              /* SCI 1 Status Register 2; 0x000000D5 */
volatile SCI1DRHSTR _SCI1DRH;                              /* SCI 1 Data Register High; 0x000000D6 */
volatile SCI1DRLSTR _SCI1DRL;                              /* SCI 1 Data Register Low; 0x000000D7 */
volatile SPI0CR1STR _SPI0CR1;                              /* SPI 0 Control Register 1; 0x000000D8 */
volatile SPI0CR2STR _SPI0CR2;                              /* SPI 0 Control Register 2; 0x000000D9 */
volatile SPI0BRSTR _SPI0BR;                                /* SPI 0 Baud Rate Register; 0x000000DA */
volatile SPI0SRSTR _SPI0SR;                                /* SPI 0 Status Register; 0x000000DB */
volatile SPI0DRSTR _SPI0DR;                                /* SPI 0 Data Register; 0x000000DD */
volatile IIC0_IBADSTR _IIC0_IBAD;                          /* IIC Address Register; 0x000000E0 */
volatile IIC0_IBFDSTR _IIC0_IBFD;                          /* IIC Frequency Divider Register; 0x000000E1 */
volatile IIC0_IBCRSTR _IIC0_IBCR;                          /* IIC Control Register; 0x000000E2 */
volatile IIC0_IBSRSTR _IIC0_IBSR;                          /* IIC Status Register; 0x000000E3 */
volatile IIC0_IBDRSTR _IIC0_IBDR;                          /* IIC Data I/O Register; 0x000000E4 */
volatile SPI1CR1STR _SPI1CR1;                              /* SPI 1 Control Register 1; 0x000000F0 */
volatile SPI1CR2STR _SPI1CR2;                              /* SPI 1 Control Register 2; 0x000000F1 */
volatile SPI1BRSTR _SPI1BR;                                /* SPI 1 Baud Rate Register; 0x000000F2 */
volatile SPI1SRSTR _SPI1SR;                                /* SPI 1 Status Register; 0x000000F3 */
volatile SPI1DRSTR _SPI1DR;                                /* SPI 1 Data Register; 0x000000F5 */
volatile SPI2CR1STR _SPI2CR1;                              /* SPI 2 Control Register 1; 0x000000F8 */
volatile SPI2CR2STR _SPI2CR2;                              /* SPI 2 Control Register 2; 0x000000F9 */
volatile SPI2BRSTR _SPI2BR;                                /* SPI 2 Baud Rate Register; 0x000000FA */
volatile SPI2SRSTR _SPI2SR;                                /* SPI 2 Status Register; 0x000000FB */
volatile SPI2DRSTR _SPI2DR;                                /* SPI 2 Data Register; 0x000000FD */
volatile FCLKDIVSTR _FCLKDIV;                              /* Flash Clock Divider Register; 0x00000100 */
volatile FSECSTR _FSEC;                                    /* Flash Security Register; 0x00000101 */
volatile FTSTMODSTR _FTSTMOD;                              /* Flash Test Mode Register; 0x00000102 */
volatile FCNFGSTR _FCNFG;                                  /* Flash Configuration Register; 0x00000103 */
volatile FPROTSTR _FPROT;                                  /* Flash Protection Register; 0x00000104 */
volatile FSTATSTR _FSTAT;                                  /* Flash Status Register; 0x00000105 */
volatile FCMDSTR _FCMD;                                    /* Flash Command Buffer and Register; 0x00000106 */
volatile FCTLSTR _FCTL;                                    /* Flash Control Register; 0x00000107 */
volatile ECLKDIVSTR _ECLKDIV;                              /* EEPROM Clock Divider Register; 0x00000110 */
volatile ECNFGSTR _ECNFG;                                  /* EEPROM Configuration Register; 0x00000113 */
volatile EPROTSTR _EPROT;                                  /* EEPROM Protection Register; 0x00000114 */
volatile ESTATSTR _ESTAT;                                  /* EEPROM Status Register; 0x00000115 */
volatile ECMDSTR _ECMD;                                    /* EEPROM Command Buffer and Register; 0x00000116 */
volatile RAMWPCSTR _RAMWPC;                                /* RAM Write Protection Control Register; 0x0000011C */
volatile RAMXGUSTR _RAMXGU;                                /* RAM XGATE Upper Boundary Register; 0x0000011D */
volatile RAMSHLSTR _RAMSHL;                                /* RAM Shared Region Lower Boundary Register; 0x0000011E */
volatile RAMSHUSTR _RAMSHU;                                /* RAM Shared Region Upper Boundary Register; 0x0000011F */
volatile IVBRSTR _IVBR;                                    /* Interrupt Vector Base Register; 0x00000121 */
volatile INT_XGPRIOSTR _INT_XGPRIO;                        /* XGATE Interrupt Priority Configuration Register; 0x00000126 */
volatile INT_CFADDRSTR _INT_CFADDR;                        /* Interrupt Request Configuration Address Register; 0x00000127 */
volatile INT_CFDATA0STR _INT_CFDATA0;                      /* Interrupt Request Configuration Data Register 0; 0x00000128 */
volatile INT_CFDATA1STR _INT_CFDATA1;                      /* Interrupt Request Configuration Data Register 1; 0x00000129 */
volatile INT_CFDATA2STR _INT_CFDATA2;                      /* Interrupt Request Configuration Data Register 2; 0x0000012A */
volatile INT_CFDATA3STR _INT_CFDATA3;                      /* Interrupt Request Configuration Data Register 3; 0x0000012B */
volatile INT_CFDATA4STR _INT_CFDATA4;                      /* Interrupt Request Configuration Data Register 4; 0x0000012C */
volatile INT_CFDATA5STR _INT_CFDATA5;                      /* Interrupt Request Configuration Data Register 5; 0x0000012D */
volatile INT_CFDATA6STR _INT_CFDATA6;                      /* Interrupt Request Configuration Data Register 6; 0x0000012E */
volatile INT_CFDATA7STR _INT_CFDATA7;                      /* Interrupt Request Configuration Data Register 7; 0x0000012F */
volatile SCI4ACR2STR _SCI4ACR2;                            /* SCI 4 Alternative Control Register 2; 0x00000132 */
volatile SCI4CR2STR _SCI4CR2;                              /* SCI 4 Control Register 2; 0x00000133 */
volatile SCI4SR1STR _SCI4SR1;                              /* SCI 4 Status Register 1; 0x00000134 */
volatile SCI4SR2STR _SCI4SR2;                              /* SCI 4 Status Register 2; 0x00000135 */
volatile SCI4DRHSTR _SCI4DRH;                              /* SCI 4 Data Register High; 0x00000136 */
volatile SCI4DRLSTR _SCI4DRL;                              /* SCI 4 Data Register Low; 0x00000137 */
volatile SCI5ACR2STR _SCI5ACR2;                            /* SCI 5 Alternative Control Register 2; 0x0000013A */
volatile SCI5CR2STR _SCI5CR2;                              /* SCI 5 Control Register 2; 0x0000013B */
volatile SCI5SR1STR _SCI5SR1;                              /* SCI 5 Status Register 1; 0x0000013C */
volatile SCI5SR2STR _SCI5SR2;                              /* SCI 5 Status Register 2; 0x0000013D */
volatile SCI5DRHSTR _SCI5DRH;                              /* SCI 5 Data Register High; 0x0000013E */
volatile SCI5DRLSTR _SCI5DRL;                              /* SCI 5 Data Register Low; 0x0000013F */
volatile PTTSTR _PTT;                                      /* Port T Data Register; 0x00000240 */
volatile PTITSTR _PTIT;                                    /* Port T Input Register; 0x00000241 */
volatile DDRTSTR _DDRT;                                    /* Port T Data Direction Register; 0x00000242 */
volatile RDRTSTR _RDRT;                                    /* Port T Reduced Drive Register; 0x00000243 */
volatile PERTSTR _PERT;                                    /* Port T Pull Device Enable Register; 0x00000244 */
volatile PPSTSTR _PPST;                                    /* Port T Polarity Select Register; 0x00000245 */
volatile PTSSTR _PTS;                                      /* Port S Data Register; 0x00000248 */
volatile PTISSTR _PTIS;                                    /* Port S Input Register; 0x00000249 */
volatile DDRSSTR _DDRS;                                    /* Port S Data Direction Register; 0x0000024A */
volatile RDRSSTR _RDRS;                                    /* Port S Reduced Drive Register; 0x0000024B */
volatile PERSSTR _PERS;                                    /* Port S Pull Device Enable Register; 0x0000024C */
volatile PPSSSTR _PPSS;                                    /* Port S Polarity Select Register; 0x0000024D */
volatile WOMSSTR _WOMS;                                    /* Port S Wired-Or Mode Register; 0x0000024E */
volatile PTMSTR _PTM;                                      /* Port M Data Register; 0x00000250 */
volatile PTIMSTR _PTIM;                                    /* Port M Input Register; 0x00000251 */
volatile DDRMSTR _DDRM;                                    /* Port M Data Direction Register; 0x00000252 */
volatile RDRMSTR _RDRM;                                    /* Port M Reduced Drive Register; 0x00000253 */
volatile PERMSTR _PERM;                                    /* Port M Pull Device Enable Register; 0x00000254 */
volatile PPSMSTR _PPSM;                                    /* Port M Polarity Select Register; 0x00000255 */
volatile WOMMSTR _WOMM;                                    /* Port M Wired-Or Mode Register; 0x00000256 */
volatile MODRRSTR _MODRR;                                  /* Module Routing Register; 0x00000257 */
volatile PTPSTR _PTP;                                      /* Port P Data Register; 0x00000258 */
volatile PTIPSTR _PTIP;                                    /* Port P Input Register; 0x00000259 */
volatile DDRPSTR _DDRP;                                    /* Port P Data Direction Register; 0x0000025A */
volatile RDRPSTR _RDRP;                                    /* Port P Reduced Drive Register; 0x0000025B */
volatile PERPSTR _PERP;                                    /* Port P Pull Device Enable Register; 0x0000025C */
volatile PPSPSTR _PPSP;                                    /* Port P Polarity Select Register; 0x0000025D */
volatile PIEPSTR _PIEP;                                    /* Port P Interrupt Enable Register; 0x0000025E */
volatile PIFPSTR _PIFP;                                    /* Port P Interrupt Flag Register; 0x0000025F */
volatile PTHSTR _PTH;                                      /* Port H Data Register; 0x00000260 */
volatile PTIHSTR _PTIH;                                    /* Port H Input Register; 0x00000261 */
volatile DDRHSTR _DDRH;                                    /* Port H Data Direction Register; 0x00000262 */
volatile RDRHSTR _RDRH;                                    /* Port H Reduced Drive Register; 0x00000263 */
volatile PERHSTR _PERH;                                    /* Port H Pull Device Enable Register; 0x00000264 */
volatile PPSHSTR _PPSH;                                    /* Port H Polarity Select Register; 0x00000265 */
volatile PIEHSTR _PIEH;                                    /* Port H Interrupt Enable Register; 0x00000266 */
volatile PIFHSTR _PIFH;                                    /* Port H Interrupt Flag Register; 0x00000267 */
volatile PTJSTR _PTJ;                                      /* Port J Data Register; 0x00000268 */
volatile PTIJSTR _PTIJ;                                    /* Port J Input Register; 0x00000269 */
volatile DDRJSTR _DDRJ;                                    /* Port J Data Direction Register; 0x0000026A */
volatile RDRJSTR _RDRJ;                                    /* Port J Reduced Drive Register; 0x0000026B */
volatile PERJSTR _PERJ;                                    /* Port J Pull Device Enable Register; 0x0000026C */
volatile PPSJSTR _PPSJ;                                    /* Port J Polarity Select Register; 0x0000026D */
volatile PIEJSTR _PIEJ;                                    /* Port J Interrupt Enable Register; 0x0000026E */
volatile PIFJSTR _PIFJ;                                    /* Port J Interrupt Flag Register; 0x0000026F */
volatile PT1AD0STR _PT1AD0;                                /* Port AD0 Data Register; 0x00000271 */
volatile DDR1AD0STR _DDR1AD0;                              /* Port AD0 Data Direction Register; 0x00000273 */
volatile RDR1AD0STR _RDR1AD0;                              /* Port AD0 Reduced Drive Register; 0x00000275 */
volatile PER1AD0STR _PER1AD0;                              /* Port AD0 Pull Up Enable Register; 0x00000277 */
volatile ATD0STAT0STR _ATD0STAT0;                          /* ATD 0 Status Register 0; 0x000002C6 */
volatile ATD0TEST1STR _ATD0TEST1;                          /* ATD 0 Test Register; 0x000002C9 */
volatile ATD0STAT1STR _ATD0STAT1;                          /* ATD 0 Status Register 1; 0x000002CB */
volatile ATD0DIENSTR _ATD0DIEN;                            /* ATD 0 Input Enable Register; 0x000002CD */
volatile ATD0PTAD0STR _ATD0PTAD0;                          /* ATD0 Port AD Register; 0x000002CF */
volatile VREGCTRLSTR _VREGCTRL;                            /* Control Register; 0x000002F1 */
volatile VREGAPICLSTR _VREGAPICL;                          /* Autonomous Periodical Interrupt Control Register; 0x000002F2 */
volatile VREGAPITRSTR _VREGAPITR;                          /* Autonomous Periodical Interrupt Trimming Register; 0x000002F3 */
volatile PWMESTR _PWME;                                    /* PWM Enable Register; 0x00000300 */
volatile PWMPOLSTR _PWMPOL;                                /* PWM Polarity Register; 0x00000301 */
volatile PWMCLKSTR _PWMCLK;                                /* PWM Clock Select Register; 0x00000302 */
volatile PWMPRCLKSTR _PWMPRCLK;                            /* PWM Prescale Clock Select Register; 0x00000303 */
volatile PWMCAESTR _PWMCAE;                                /* PWM Center Align Enable Register; 0x00000304 */
volatile PWMCTLSTR _PWMCTL;                                /* PWM Control Register; 0x00000305 */
volatile PWMSCLASTR _PWMSCLA;                              /* PWM Scale A Register; 0x00000308 */
volatile PWMSCLBSTR _PWMSCLB;                              /* PWM Scale B Register; 0x00000309 */
volatile PWMSDNSTR _PWMSDN;                                /* PWM Shutdown Register; 0x00000324 */
volatile PITCFLMTSTR _PITCFLMT;                            /* PIT Control and Force Load Micro Timer Register; 0x00000340 */
volatile PITFLTSTR _PITFLT;                                /* PIT Force Load Timer Register; 0x00000341 */
volatile PITCESTR _PITCE;                                  /* PIT Channel Enable Register; 0x00000342 */
volatile PITMUXSTR _PITMUX;                                /* PIT Multiplex Register; 0x00000343 */
volatile PITINTESTR _PITINTE;                              /* PIT Interrupt Enable Register; 0x00000344 */
volatile PITTFSTR _PITTF;                                  /* PIT Time-out Flag Register; 0x00000345 */
volatile PITMTLD0STR _PITMTLD0;                            /* PIT Micro Timer Load Register 0; 0x00000346 */
volatile PITMTLD1STR _PITMTLD1;                            /* PIT Micro Timer Load Register 1; 0x00000347 */
volatile XGCHIDSTR _XGCHID;                                /* XGATE Channel ID Register; 0x00000382 */
volatile XGCCRSTR _XGCCR;                                  /* XGATE Condition Code Register; 0x0000039D */
/* NVFPROT - macro for reading non volatile register       Non Volatile Flash Protection Register; 0x0000FF0D */
/* NVFCTL - macro for reading non volatile register        Non Volatile Flash Control Register; 0x0000FF0E */
/* NVFSEC - macro for reading non volatile register        Non Volatile Flash Security Register; 0x0000FF0F */


/* * * * *  16-BIT REGISTERS  * * * * * * * * * * * * * * * */
volatile PORTABSTR _PORTAB;                                /* Port AB Data Register; 0x00000000 */
volatile DDRABSTR _DDRAB;                                  /* Port AB Data Direction Register; 0x00000002 */
volatile PORTCDSTR _PORTCD;                                /* Port CD Data Register; 0x00000004 */
volatile DDRCDSTR _DDRCD;                                  /* Port CD Data Direction Register; 0x00000006 */
volatile PARTIDSTR _PARTID;                                /* Part ID Register; 0x0000001A */
volatile DBGTBSTR _DBGTB;                                  /* Debug Trace Buffer Register; 0x00000024 */
volatile TCNTSTR _TCNT;                                    /* Timer Count Register; 0x00000044 */
volatile TC0STR _TC0;                                      /* Timer Input Capture/Output Compare Register 0; 0x00000050 */
volatile TC1STR _TC1;                                      /* Timer Input Capture/Output Compare Register 1; 0x00000052 */
volatile TC2STR _TC2;                                      /* Timer Input Capture/Output Compare Register 2; 0x00000054 */
volatile TC3STR _TC3;                                      /* Timer Input Capture/Output Compare Register 3; 0x00000056 */
volatile TC4STR _TC4;                                      /* Timer Input Capture/Output Compare Register 4; 0x00000058 */
volatile TC5STR _TC5;                                      /* Timer Input Capture/Output Compare Register 5; 0x0000005A */
volatile TC6STR _TC6;                                      /* Timer Input Capture/Output Compare Register 6; 0x0000005C */
volatile TC7STR _TC7;                                      /* Timer Input Capture/Output Compare Register 7; 0x0000005E */
volatile PACN32STR _PACN32;                                /* Pulse Accumulators Count 32 Register; 0x00000062 */
volatile PACN10STR _PACN10;                                /* Pulse Accumulators Count 10 Register; 0x00000064 */
volatile PA32HSTR _PA32H;                                  /* 8-Bit Pulse Accumulators Holding 32 Register; 0x00000072 */
volatile PA10HSTR _PA10H;                                  /* 8-Bit Pulse Accumulators Holding 10 Register; 0x00000074 */
volatile MCCNTSTR _MCCNT;                                  /* Modulus Down-Counter Count Register; 0x00000076 */
volatile TC0HSTR _TC0H;                                    /* Timer Input Capture Holding Registers 0; 0x00000078 */
volatile TC1HSTR _TC1H;                                    /* Timer Input Capture Holding Registers 1; 0x0000007A */
volatile TC2HSTR _TC2H;                                    /* Timer Input Capture Holding Registers 2; 0x0000007C */
volatile TC3HSTR _TC3H;                                    /* Timer Input Capture Holding Registers 3; 0x0000007E */
volatile ATD1CTL01STR _ATD1CTL01;                          /* ATD 1 Control Register 01; 0x00000080 */
volatile ATD1CTL23STR _ATD1CTL23;                          /* ATD 1 Control Register 23; 0x00000082 */
volatile ATD1CTL45STR _ATD1CTL45;                          /* ATD 1 Control Register 45; 0x00000084 */
volatile ATD1DIENSTR _ATD1DIEN;                            /* ATD 1 Input Enable Register; 0x0000008C */
volatile ATD1PTADSTR _ATD1PTAD;                            /* ATD 1 Port AD Register; 0x0000008E */
volatile ATD1DR0STR _ATD1DR0;                              /* ATD 1 Conversion Result Register 0; 0x00000090 */
volatile ATD1DR1STR _ATD1DR1;                              /* ATD 1 Conversion Result Register 1; 0x00000092 */
volatile ATD1DR2STR _ATD1DR2;                              /* ATD 1 Conversion Result Register 2; 0x00000094 */
volatile ATD1DR3STR _ATD1DR3;                              /* ATD 1 Conversion Result Register 3; 0x00000096 */
volatile ATD1DR4STR _ATD1DR4;                              /* ATD 1 Conversion Result Register 4; 0x00000098 */
volatile ATD1DR5STR _ATD1DR5;                              /* ATD 1 Conversion Result Register 5; 0x0000009A */
volatile ATD1DR6STR _ATD1DR6;                              /* ATD 1 Conversion Result Register 6; 0x0000009C */
volatile ATD1DR7STR _ATD1DR7;                              /* ATD 1 Conversion Result Register 7; 0x0000009E */
volatile ATD1DR8STR _ATD1DR8;                              /* ATD 1 Conversion Result Register 8; 0x000000A0 */
volatile ATD1DR9STR _ATD1DR9;                              /* ATD 1 Conversion Result Register 9; 0x000000A2 */
volatile ATD1DR10STR _ATD1DR10;                            /* ATD 1 Conversion Result Register 10; 0x000000A4 */
volatile ATD1DR11STR _ATD1DR11;                            /* ATD 1 Conversion Result Register 11; 0x000000A6 */
volatile ATD1DR12STR _ATD1DR12;                            /* ATD 1 Conversion Result Register 12; 0x000000A8 */
volatile ATD1DR13STR _ATD1DR13;                            /* ATD 1 Conversion Result Register 13; 0x000000AA */
volatile ATD1DR14STR _ATD1DR14;                            /* ATD 1 Conversion Result Register 14; 0x000000AC */
volatile ATD1DR15STR _ATD1DR15;                            /* ATD 1 Conversion Result Register 15; 0x000000AE */
volatile SCI2BDSTR _SCI2BD;                                /* SCI 2 Baud Rate Register; 0x000000B8 */
volatile SCI3BDSTR _SCI3BD;                                /* SCI 3 Baud Rate Register; 0x000000C0 */
volatile SCI0BDSTR _SCI0BD;                                /* SCI 0 Baud Rate Register; 0x000000C8 */
volatile SCI1BDSTR _SCI1BD;                                /* SCI 1 Baud Rate Register; 0x000000D0 */
volatile FADDRSTR _FADDR;                                  /* Flash Address Register; 0x00000108 */
volatile FDATASTR _FDATA;                                  /* Flash Data Register; 0x0000010A */
volatile EADDRSTR _EADDR;                                  /* EEPROM Addres register; 0x00000118 */
volatile EDATASTR _EDATA;                                  /* EEPROM Data Register; 0x0000011A */
volatile SCI4BDSTR _SCI4BD;                                /* SCI 4 Baud Rate Register; 0x00000130 */
volatile SCI5BDSTR _SCI5BD;                                /* SCI 5 Baud Rate Register; 0x00000138 */
volatile PT01AD1STR _PT01AD1;                              /* Port AD1 Data Register; 0x00000278 */
volatile DDR01AD1STR _DDR01AD1;                            /* Port AD1 Data Direction Register; 0x0000027A */
volatile RDR01AD1STR _RDR01AD1;                            /* Port AD1 Reduced Drive Register; 0x0000027C */
volatile PER01AD1STR _PER01AD1;                            /* Port AD1 Pull Up Enable Register; 0x0000027E */
volatile ATD0CTL01STR _ATD0CTL01;                          /* ATD 0 Control Register 01; 0x000002C0 */
volatile ATD0CTL23STR _ATD0CTL23;                          /* ATD 0 Control Register 23; 0x000002C2 */
volatile ATD0CTL45STR _ATD0CTL45;                          /* ATD 0 Control Register 45; 0x000002C4 */
volatile ATD0DR0STR _ATD0DR0;                              /* ATD 0 Conversion Result Register 0; 0x000002D0 */
volatile ATD0DR1STR _ATD0DR1;                              /* ATD 0 Conversion Result Register 1; 0x000002D2 */
volatile ATD0DR2STR _ATD0DR2;                              /* ATD 0 Conversion Result Register 2; 0x000002D4 */
volatile ATD0DR3STR _ATD0DR3;                              /* ATD 0 Conversion Result Register 3; 0x000002D6 */
volatile ATD0DR4STR _ATD0DR4;                              /* ATD 0 Conversion Result Register 4; 0x000002D8 */
volatile ATD0DR5STR _ATD0DR5;                              /* ATD 0 Conversion Result Register 5; 0x000002DA */
volatile ATD0DR6STR _ATD0DR6;                              /* ATD 0 Conversion Result Register 6; 0x000002DC */
volatile ATD0DR7STR _ATD0DR7;                              /* ATD 0 Conversion Result Register 7; 0x000002DE */
volatile VREGAPIRSTR _VREGAPIR;                            /* Autonomous Periodical Interrupt Rate Register; 0x000002F4 */
volatile PWMCNT01STR _PWMCNT01;                            /* PWM Channel Counter 01 Register; 0x0000030C */
volatile PWMCNT23STR _PWMCNT23;                            /* PWM Channel Counter 23 Register; 0x0000030E */
volatile PWMCNT45STR _PWMCNT45;                            /* PWM Channel Counter 45 Register; 0x00000310 */
volatile PWMCNT67STR _PWMCNT67;                            /* PWM Channel Counter 67 Register; 0x00000312 */
volatile PWMPER01STR _PWMPER01;                            /* PWM Channel Period 01 Register; 0x00000314 */
volatile PWMPER23STR _PWMPER23;                            /* PWM Channel Period 23 Register; 0x00000316 */
volatile PWMPER45STR _PWMPER45;                            /* PWM Channel Period 45 Register; 0x00000318 */
volatile PWMPER67STR _PWMPER67;                            /* PWM Channel Period 67 Register; 0x0000031A */
volatile PWMDTY01STR _PWMDTY01;                            /* PWM Channel Duty 01 Register; 0x0000031C */
volatile PWMDTY23STR _PWMDTY23;                            /* PWM Channel Duty 23 Register; 0x0000031E */
volatile PWMDTY45STR _PWMDTY45;                            /* PWM Channel Duty 45 Register; 0x00000320 */
volatile PWMDTY67STR _PWMDTY67;                            /* PWM Channel Duty 67 Register; 0x00000322 */
volatile PITLD0STR _PITLD0;                                /* PIT Load Register 0; 0x00000348 */
volatile PITCNT0STR _PITCNT0;                              /* PIT Count Register 0; 0x0000034A */
volatile PITLD1STR _PITLD1;                                /* PIT Load Register 1; 0x0000034C */
volatile PITCNT1STR _PITCNT1;                              /* PIT Count Register 1; 0x0000034E */
volatile PITLD2STR _PITLD2;                                /* PIT Load Register 2; 0x00000350 */
volatile PITCNT2STR _PITCNT2;                              /* PIT Count Register 2; 0x00000352 */
volatile PITLD3STR _PITLD3;                                /* PIT Load Register 3; 0x00000354 */
volatile PITCNT3STR _PITCNT3;                              /* PIT Count Register 3; 0x00000356 */
volatile XGMCTLSTR _XGMCTL;                                /* XGATE Control Register; 0x00000380 */
volatile XGVBRSTR _XGVBR;                                  /* XGATE Control Register; 0x00000386 */
volatile XGIF_7F_70STR _XGIF_7F_70;                        /* XGATE Channel Interrupt Flag Vector; 0x00000388 */
volatile XGIF_6F_60STR _XGIF_6F_60;                        /* XGATE Channel Interrupt Flag Vector; 0x0000038A */
volatile XGIF_5F_50STR _XGIF_5F_50;                        /* XGATE Channel Interrupt Flag Vector; 0x0000038C */
volatile XGIF_4F_40STR _XGIF_4F_40;                        /* XGATE Channel Interrupt Flag Vector; 0x0000038E */
volatile XGIF_3F_30STR _XGIF_3F_30;                        /* XGATE Channel Interrupt Flag Vector; 0x00000390 */
volatile XGIF_2F_20STR _XGIF_2F_20;                        /* XGATE Channel Interrupt Flag Vector; 0x00000392 */
volatile XGIF_1F_10STR _XGIF_1F_10;                        /* XGATE Channel Interrupt Flag Vector; 0x00000394 */
volatile XGIF_0F_00STR _XGIF_0F_00;                        /* XGATE Channel Interrupt Flag Vector; 0x00000396 */
volatile XGSWTSTR _XGSWT;                                  /* XGATE Control Register; 0x00000398 */
volatile XGSEMSTR _XGSEM;                                  /* XGATE Semaphore Register; 0x0000039A */
volatile XGPCSTR _XGPC;                                    /* XGATE Program Counter Register; 0x0000039E */
volatile XGR1STR _XGR1;                                    /* XGATE Register 1; 0x000003A2 */
volatile XGR2STR _XGR2;                                    /* XGATE Register 2; 0x000003A4 */
volatile XGR3STR _XGR3;                                    /* XGATE Register 3; 0x000003A6 */
volatile XGR4STR _XGR4;                                    /* XGATE Register 4; 0x000003A8 */
volatile XGR5STR _XGR5;                                    /* XGATE Register 5; 0x000003AA */
volatile XGR6STR _XGR6;                                    /* XGATE Register 6; 0x000003AC */
volatile XGR7STR _XGR7;                                    /* XGATE Register 7; 0x000003AE */
/* BAKEY0 - macro for reading non volatile register        Backdoor Comparison Key 0; 0x0000FF00 */
/* BAKEY1 - macro for reading non volatile register        Backdoor Comparison Key 1; 0x0000FF02 */
/* BAKEY2 - macro for reading non volatile register        Backdoor Comparison Key 2; 0x0000FF04 */
/* BAKEY3 - macro for reading non volatile register        Backdoor Comparison Key 3; 0x0000FF06 */

/*lint -restore */

/* EOF */
